CMOS Current Mode Winner-Take-All Circuit with Distributed Hysteresis

An analogue-VLSI winner-take-all circuit is enhanced through the addition of hysteretic feedback that emphasizes the spatial locality of competing signals using a resistive network. This circuit has application to tasks in areas such as image processing, in which inputs are not stationary with respect to the circuit array. Introduction Analogue VLSI circuits facilitate the implementation of low-power, real-time visual image processing systems [1]. One task, critical to developing such visual systems that solve real-world problems, is the process of selecting an object and maintaining attention on that selected object [2]. Object selection that produces an output that represents a single stimulus (object) can be accomplished using a winner-take-all circuit. In order to mediate the competition between potential winners, hysteresis can be added to such a winner-takeall circuit through the addition of local feedback to the winning node in the array. The addition of hysteresis enhances the presently winning stimulus, providing an attention mechanism that resists the selection of a new winner unless that stimulus has a value much greater than the present winner [3]. If the stimuli are moving, however, a presently attended input may shift slightly to an adjacent processing element, being forced to compete with all other inputs without the advantage that is normally provided by the hysteretic current. In order to allow for movements of a stimulus between adjacent processing elements while retaining attention, we have developed a circuit that provides hysteresis not only to the present winner, but also to the neighboring elements in the winner-take-all circuit.